The present invention generally relates to semiconductor device manufacturing, and more particularly to the formation of multiple FinFETs having different threshold-voltages (Vt).
Complementary metal oxide semiconductor (CMOS) devices exhibit a threshold voltage (Vt). A voltage applied to the gate of a device (gate voltage) that equals or exceeds the threshold voltage induces a low resistance conductive path between the source and drain regions of the device. While a gate voltage that is below the threshold voltage results in little or no conductive path between the source and drain regions.
In electronic circuits, devices with different threshold voltages are used to realize circuit function. Previous methods of fabricating multiple devices with different threshold voltages included implanting different types of substrate dopants for FET devices that result in different threshold voltages.